LOGIC IC

The 74HC244; 74HCT244 is an 8-bit buffer/line driver with 3-state outputs. The device can be used as two 4-bit buffers or one 8-bit buffer. The device features two output enables (1OE and 2OE), each controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.

The 74HC245; 74HCT245 is an 8-bit transceiver with 3-state outputs. The device features an output enable (OE) and send/receive (DIR) for direction control. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

The U74HC164 is an 8-bit edge-triggered shift registers with serial input and parallel output. A LOW-to-HIGH transition on the CP will shifts the data one place to the right which is the logical AND of DSA and DSB. A LOW level on the MR will clear the registers asynchronously and force the outputs LOW

We have all the products mentioned below in stock.
CD4012     CD4013      CD4017  
CD40175   CD4020      CD4023
CD4024     CD4025      CD4028
CD4029     CD4033      CD4040
CD4041     CD4042      CD4046
CD4049     CD4050      CD4051
CD4052     CD4053      CD4060

The LVT244A is a high-performance BiCMOS device built for 3.3V VCC operation. This is an octal buffer designed for driving bus lines. The device has two Output Enables (OE1, OE2), each of which regulates four of the three-state outputs.

These full adders perform the addition of two 4-bit binary numbers. The sum (∑) outputs are provided for each bit and the resultant carry (C4) is obtained from the fourth bit. These adders feature full internal look ahead across all four bits. This provides the system designer with partial lookahead performance at the economy and reduced package count of a ripple-carry implementation. The adder logic, including the carry, is implemented in its true form meaning that the end-around carry can be accomplished without the need for logic or level inversion

All these products are available in DIP and SMD 

74LS365 Entire Series 74LS684 Entire Series
74LS374 Entire Series 74LS623 Entire Series
74LS378 Entire Series 74LS673 Entire Series
74LS390 Entire Series 74LS640 Entire Series
74LS373 Entire Series 74LS645 Entire Series
74LS377 Entire Series 74LS646 Entire Series
74LS30  Entire Series  74LS629 Entire Series
74LS42  Entire Series  74LS624 Entire Series
74LS43  Entire Series  74LS688 Entire Series
74LS423 Entire Series 74LS642 Entire Series
74LS598 Entire Series 74LS641 Entire Series
74LS597 Entire Series 74LS75   Entire Series
74LS596 Entire Series 74LS73  Entire Series
74LS595 Entire Series 74LS74  Entire Series
74LS594 Entire Series 74LS86  Entire Series
74LS593 Entire Series 74LS85  Entire Series
74LS592 Entire Series 74LS92  Entire Series
74LS590 Entire Series 74LS93  Entire Series
74LS540 Entire Series 74LS90  Entire Series
74LS541 Entire Series

The SNx4HC573A devices are 3-state octal transparent D-type latches with octal outputs intended primarily for controlling low or high capacitance loads. They are particularly well suited for the implementation of functioning registers, bidirectional bus drivers, and I/O ports. The Q outputs react to data (D) inputs when the latch-enable (LE) input is high. The outputs are latched to hold onto the set data while LE is low.

Established in the year 2016 at Mumbai Maharashtra we Adinath Electronics are a Sole Proprietorship based firm engaged as the foremost Wholesale Supplier and Importer of SMD Resistors PCB Connector etc Our products are high in demand due to their premium quality and affordable prices Furthermore we ensure to timely deliver these products to our clients through this we have gained a huge clients base in the market we are importing our products from Taiwan Singapore and Malaysia

Established in the year 2016 at Mumbai Maharashtra we Adinath Electronics are a Sole Proprietorship based firm engaged as the foremost Wholesale Supplier and Importer of SMD Resistors PCB Connector etc Our products are high in demand due to their premium quality and affordable prices Furthermore we ensure to timely deliver these products to our clients through this we have gained a huge clients base in the market we are importing our products from Taiwan Singapore and Malaysia

These line drivers, octal buffers, and 3-state memory address drivers are especially made to increase the speed and density of bus-oriented receivers and transmitters. Two 4-bit buffers or drivers with independent output-enable (OE) inputs make up the SNx4HCT244 devices. The gadget sends non-inverted data from the A inputs to the Y outputs when OE is low. The outputs are in the high-impedance condition when OE is high.

The HEF4081B is a quad 2-input AND gate. The outputs are fully buffered for highest noise immunity and pattern insensitivity to output impedance variations. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input.

The UTC U74HC14 each contain six inverting Schmitt triggers in one package. Each of them perform the Boolean function Y=A.
FEATURES

1. Widely range of input rise and fall time
2. high noise immunity
3. Fan-out parameters(over temperature range) up to 10 LSTTL Loads 
4. Low power consumption 
5. Wide range operation 2V ~ 6V

The CD14538B is interchangeable with type MC14538 and is similar to and pin-compatible with the CD4098B* and CD4538B. It can replace the CD4538B which type is not recommended for new designs. The CD14538B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes)

The CD4094B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

We have all the products metioned below in stock
CD4067  CD4069  CD4071
CD4072  CD4073  CD4076
CD4077  CD4078  CD4093
CD4094

These 8-bit registers feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The high-impedance 3-state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pullup components. These devices are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working reg

An 8 bit addressable latch is the 74HC259 74HCT259 device The gadget has four different operating modes Data from the D input is written into the latch in the addressable latch mode which is addressed by the inputs A0 through A3 Non addressed latches keep their former states whereas the addressed latch follows the data input All latches maintain their original states while operating in memory mode and are unaffected by the data or address inputs The addressed output follows the D input and all other outputs are LOW when using the 3 to 8 decoding or demultiplexing mode All outputs are constrained to be LOW and unaffected by the data or address inputs when in reset mode Among the inputs are clamp diodes

These octal buffers and line drivers have a pinout with inputs and outputs on opposing sides of the package and perform as well as SNx4HC541 devices. The layout of printed circuit boards is substantially facilitated by this configuration. A two-input NOR gate regulates the 3-state outputs. All eight outputs are in the high-impedance state if any of the output-enable inputs (OE1 or OE2) is high. The outputs of the SNx4HC541 devices deliver genuine data.

The 74LS73A has separate J, K, clear, and clock inputs. These twin flip-flops are made to take data when the clock is HIGH and the inputs are enabled. As long as minimal set-up durations are followed, the bistable will behave in accordance with the truth table even if the logic level of the J and K inputs changes while the clock pulse is HIGH. On the clock pulse's negative going edge, input data is sent to the outputs.